
🎉 CONGRATULATIONS 🎉
It’s a verified certificate from Intern Certify
- Learner Full Name : Gangu Vasudeva Rao
- Internship Course : VLSI Design with Verilog
- Duration : 26/12/2024 to 29/03/2025
The details accessed via the QR code are secure and will only display the information related to the learner’s internship.